News
Our paper PNMAX on mapping-architecture co-exploration for processing near memory was accepted to MICRO 2026.
Our paper GLOW on glitch optimization with retiming for low power was accepted to ICCAD 2026.
GLOW received the Best Student Paper Award at IWLS 2026.
Our paper GLOW on retiming for low power was accepted to IWLS 2026.
I joined the CPU Architecture Team at Huawei Hong Kong Research Center as a research intern, working on system performance engineering for next-generation CPUs.
OptiPIM received the Distinguished Artifact Award at ISCA 2025.
Our paper OptiPIM on optimizing processing-in-memory acceleration with integer linear programming was accepted to ISCA 2025.
Our paper on fast switching activity estimation for HLS-produced dataflow circuits was accepted to FPL 2024.
I joined the DYNAMO group at ETH Zürich as a Ph.D. student, advised by Prof. Lana Josipović. Our Yun vector processor paper also appeared in IEEE TCAS-II.
Presented our paper on load-store queue sizing for dataflow circuits at FPT 2022.