CV
Curriculum vitae of Jiantao Liu.
Contact Information
| Name | Jiantao Liu |
| Professional Title | Ph.D. Student, ETH Zürich |
| jianliu@ethz.ch | |
| Location | Zürich, Switzerland |
| Website | https://qianxu1998.github.io |
Professional Summary
Ph.D. student in the DYNAMO group at ETH Zürich, advised by Prof. Dr. Lana Josipović. My research spans high-level synthesis, processing-in-memory, and electronic design automation, with a broader interest in computer architecture and efficient computing systems.
Experience
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2026 - present Hong Kong
Research Intern, CPU Architecture Team
Huawei Hong Kong Research Center (HKRC)
System performance engineering for next-generation CPU architectures.
- Evaluating the impact of new Arm ISA extensions and the Scalable Matrix Extension (SME) on computational kernels.
- Analyzing agentic AI workloads to guide next-generation CPU architecture design.
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2024 Zürich, Switzerland
Teaching Assistant
DYNAMO group, ETH Zürich
Synthesis of Digital Circuits (Spring 2024).
Education
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2023 - present Zürich, Switzerland
Ph.D.
ETH Zürich
Electrical Engineering and Information Technology
- Advisor: Prof. Dr. Lana Josipović (DYNAMO group).
- Research focus: processing-in-memory, electronic design automation, tensor kernel mapping.
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2022 - 2023 San Diego, U.S.A.
Ph.D. (transferred to ETH Zürich)
University of California San Diego
Computer Engineering
- GPA: 4.0/4.0.
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2020 - 2022 Zürich, Switzerland
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2016 - 2020 Wuhan, China
B.Eng.
Huazhong University of Science and Technology
Electrical and Electronics Engineering
- GPA: 3.92/4.00.
Awards
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2026 Best Student Paper Award
International Workshop on Logic and Synthesis (IWLS 2026)
For GLOW: Glitch Optimization with Retiming for Low Power.
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2025 Distinguished Artifact Award
International Symposium on Computer Architecture (ISCA 2025)
For OptiPIM: Optimizing Processing In-Memory Acceleration Using Integer Linear Programming.
Publications
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2026 PNMAX: Mapping-Architecture Co-Exploration Framework for Processing near Memory
Chien-Yi Yang*, Jiantao Liu*, Yue Pan, et al. — MICRO 2026 (to appear)
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2026 GLOW: Glitch Optimization with Retiming for Low Power
Jiantao Liu*, Carmine Rizzi*, Pravriti Jaipuriyar, et al. — ICCAD 2026 (to appear)
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2026 GLOW: Glitch Optimization with Retiming for Low Power
Jiantao Liu*, Carmine Rizzi*, Pravriti Jaipuriyar, et al. — IWLS 2026
Best Student Paper Award.
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2025 OptiPIM: Optimizing Processing In-Memory Acceleration Using Integer Linear Programming
Jiantao Liu, Minxuan Zhou, Yue Pan, Chien-Yi Yang, Lana Josipović, and Tajana Rosing — ISCA 2025
Distinguished Artifact Award.
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2024 Fast Switching Activity Estimation for HLS-Produced Dataflow Circuits
Jiantao Liu, Maksymilian Graczyk, Andrea Guerrieri, and Lana Josipović — FPL 2024
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2023 Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS
Matteo Perotti, Matheus A. Cavalcante, Alessandro Ottaviano, Jiantao Liu, and Luca Benini — IEEE TCAS-II, 2023
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2022 Load-Store Queue Sizing for Efficient Dataflow Circuits
Jiantao Liu, Carmine Rizzi, and Lana Josipović — FPT 2022
Professional Service
- Journal reviewer: IEEE TCAD, IEEE TPDS.
Skills
Programming & HDLs: C/C++, Python, OCaml, SQL, P4, Scala, SystemVerilog, Chisel, HTML, LabVIEW, PyTorch, TensorFlow
Tools: LLVM, MLIR, Synopsys Design Compiler, Fusion Compiler, Vivado, Vitis, Cadence Genus, Innovus, Joules, Calibre, OpenROAD, MySQL, MongoDB, Docker, OpenCV, Cerebras SDK
Languages
Chinese : Native speaker
English : Fluent